Technical Program Manager- Silicon Physical Design

**What MatX Is Building** MatX is on a mission to be the compute platform for Artificial General Intelligence. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest Machine Learning workloads for Artificial General Intelligence. MatX is seeking a Technical Program Manager to join our silicon team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for this role will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. **About the Role** You will own the cross-functional execution framework for advanced SOC programs from early planning through tapeout. You will drive milestones, dependencies, execution reviews, decision-making forums, risk management, and tapeout readiness across multiple engineering teams. **What You'll Do Here** - Develop playbooks and best practices for program management across the PD organization for cross-functional deliveries. - Lead end-to-end execution of SoC development programs from concept through production - Drive issue resolution during pre-silicon execution, tapeout, bring-up, debug, qualification, and yield learning ensuring physical design readiness. - Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs. - Build and maintain program trackers, risk registers, and executive dashboards covering each engagement - Track technical dependencies,schedule risks, owners, closure dates, critical path, program milestones, tapeout readiness, and silicon bring-up deliverables. schedule risks, owners, closure dates, and escalation paths. - Drive gate reviews and weekly program syncs physical design, and validation teams - Manage technical risks related to schedule, design maturity, Intellectual Property readiness, verification closure, physical signoff, package/test readiness, and supply chain. - Prepare executive-level updates covering milestone health, top risks, decisions needed, critical path, and resource gaps. ## **Who you are** - 10+ years of technical program management, silicon engineering program management or leading SoC programs through multiple phases of the silicon lifecycle. - Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and aggressive schedules. - Experience with program planning, dependency management, milestone tracking, and technical risk management. - Experience managing pre-silicon Application Specific Integrated Circuit development flows, including architecture planning, RTL design, functional verification, synthesis, DFT, physical design, timing closure, signoff, and tapeout. - Experience with pre-silicon validation platforms such as simulation, emulation, Field-Programmable Gate Array prototyping, or hardware/software co-validation. - Strong technical judgment with the ability to manage trade-offs across performance, power, area, cost, schedule, quality, and risk. - Technical fluency in SoC or chiplet design flows - enough to understand RTL milestones, DV sign-off, PD handoffs, and silicon bring-up phases without needing translation - Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication. - Experience coordinating design reviews and driving closure across cross-functional engineering teams. - Strong written and verbal communication skills, including the ability to summarize technical risks, tradeoffs, decisions, and schedule impact. - Proficiency with program-management and engineering collaboration tools such as Jira, GitHub, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent. ## **Bonus Points If You Have** - Experience with AI infrastructure, datacenter racks, networking systems,…