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Staff Power Systems Safety Engineer

Apptronik · Austin, TX
Full-timeHardwareHealthcare$179,000–$241,000/yr
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About the Staff Power System Safety Engineer role

Staff Power System Safety Engineer positions focus on delivering results in their domain. This page aggregates open Staff Power System Safety Engineer roles and what employers typically expect.

Apptronik is a human-centered robotics company developing AI-powered robots to support humanity in every facet of life. Our flagship humanoid robot, Apollo, is built to collaborate thoughtfully with people, starting with critical industries such as manufacturing and logistics, with future applications in healthcare, the home, and beyond. We operate at the cutting edge of Applied AI, applying our expertise across the full robotics stack to solve some of society's most important problems. You will join a team dedicated to bringing Apollo to market at scale, tackling the complex challenges like safety, commercialization, and mass production to change the world for the better. JOB SUMMARY: As the Staff Power Systems Safety Engineer, you are the ultimate technical authority on the electrical safety of Apollo’s power architecture. Our flagship robot, Apollo, operates in highly dynamic environments, requiring high currents through a densely packaged, articulating chassis. We are scaling our engineering organization and looking for a hardware engineer to ensure that our power delivery networks are inherently, physically safe. ESSENTIAL DUTIES AND RESPONSIBILITIES or KEY ACCOUNTABILITIES: Hardware Safety Architecture Safety Requirements Flow-Down: Translate top-level functional safety requirements into rigorous schematic-level constraints, safety-critical board-level layouts, and architectural definitions to guarantee deterministic hardware safety behavior. Architect Safety Functions: Formally design and own the hardware-enforced fail-safe safety pathways—such as Safe Torque Off (STO), Safe Brake Control (SBC), and Emergency Stop (E-stop) loops—ensuring strict compliance with Performance Levels (PLr per ISO 13849-1) and Safety Integrity Levels (SIL per IEC 61508/IEC 62061). Define the hardware/software boundary: design the physical signaling pathways and watchdogs that allow the high-current hardware to reliably inform the firmware of an impending fault, while ensuring the ultimate safety shutoff remains physically hardwired. PCB & Interconnect Design Authority Enforce Design Rule Check (DRC) Standards: Establish electrical design standards for high-reliability packaging and assembly utilizing IPC-2221/IPC-2223 for trace routing/clearances and IPC-A-600/IPC-A-610 for board acceptability. PCB Stack-up & Thermal-Electrical Governance: Dictate PCB stack-ups, heavy-copper trace ampacity rules, and thermal-electrical limits for power distribution boards, motor drivers, and compute boards. Overcurrent Protection Coordination (IEC 60204-1): Architect multi-tiered fusing and protective strategies to guarantee complete fault coordination, ensuring protection elements predictably interrupt fault paths before conductor insulation, wire harnesses, or PCB laminate layers reach degradation or glass transition thresholds. Risk Analysis, Root Cause, & Auditing Safety Gatekeeper: Serve as the absolute sign-off authority on all engineering change releases and tape-outs affecting system power or functional safety, preserving final veto power over any assembly violating critical safety margins. Rigorous Safety Analytics: Author and manage specialized compliance safety documentation, directly executing and owning hardware-focused Design Failure Mode and Effects Analyses (DFMEAs), Hazard Analysis and Risk Assessments (HARA), and Fault Tree Analyses (FTAs). Worst-Case Circuit Analysis (WCCA): Utilize SPICE-based simulation tools to mathematically prove design performance margins across manufacturing component tolerances, extreme operating temperatures, and structural lifetime aging metrics. Root Cause Forensics: Direct engineering investigations and teardowns for power delivery anomalies, mechanical stress limits, thermal events, or localized component degradations discovered during Hardware-in-the-Loop (HIL) qualification, laboratory evaluation, or active fleet deployments. Third-Party Certification & External Lab Management Certification Strategy: Own the…

Salary estimate

$179,000 – $241,000/yr
Provided by the employer.

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About Apptronik

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