Signal Integrity Engineer - Serdes, Satellites (Starlink)

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SIGNAL INTEGRITY ENGINEER - SERDES, SATELLITES (STARLINK) SpaceX is leveraging its experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact. As we continue to upgrade and expand the constellation, we’re looking for best-in-class engineers to join the team. As a Signal Integrity Engineer on Starlink’s Payload Engineering team, you’ll have SI ownership throughout the entire life-cycle of the portfolio of hardware that enables this connectivity, and sits at the intersection of electrical, mechanical, thermal analysis, software, and antenna/RF engineering. Early in any given product’s design cycle, your work will include everything from IP evaluation in the silicon architecture stage, package performance evaluation, stack-up material selection and characterization, channel architecture, and PCB layout oversight. Once hardware is in hand, you will drive troubleshooting, characterization, qualification, and general debug across all phases of the product’s life. You will help define the design, analysis, and verification processes and tools that the Starlink team uses when developing hardware. You will have wide latitude to determine how best to tackle these problems and be expected to spread the associated knowledge and techniques to engineers across the Starlink program. RESPONSIBILITIES : Specify, design, simulate, verify, qualify, define production screens for, and generally troubleshoot SI aspects of advanced satellite hardware, such as: Wireline and electro-optical communication systems with cutting edge (e.g. 10 to 112+ Gbps) SERDES, DSPs, retimers, and optoelectronics High-speed and high-bandwidth memory interfaces (DDR4, LPDDR5, GPDDR6, QSPI NOR, eMMC, etc.) Work alongside RF engineers, antenna engineers, ASIC engineers, packaging engineers, mechanical engineers, thermal engineers, software engineers, supply chain, and production engineers (among others) to architect new products which will employ novel channels, interfaces, and power delivery strategies Derive top level specifications for PCB materials and channel subcomponents Design and optimize transition structures for the entire channel from die bump to die bump Root cause and fix issues found in PCB manufacturing, PCBA test, or satellite integration Define best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs for all SI needs on Starlink satellite payloads BASIC QUALIFICATIONS: Bachelor’s degree in electrical engineering, computer engineering, or physics 1+ years of industry experience designing circuits, electronic products, or hardware (internships, co-ops, and research/lab work can apply) 1+ years of experience using one of the 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS etc.) 1+ years of research or industry experience with high-speed digital design PREFERRED SKILLS AND EXPERIENCE: Master’s degree or PhD in electrical engineering, computer engineering with emphasis in electromagnetic theory, transmission line theory, or wireline transceivers 3+ years of electronic product experience designing hardware from concept through production; strong emphasis on full life-cycle development of new hardware products and not small incremental updates…