Senior Engineer I, Process Engineering [CMP]

Step into a career with ASM, where cutting edge technology meets collaborative culture. ​ For over 55 years ASM has been ahead of what’s next, at the forefront of innovation and what’s technologically possible. With more than 4,500 ASMers representing 70 nationalities, our people and our advanced semiconductor devices are playing a crucial role in trends such as 5G, cloud computing, AI, and autonomous driving. But we’re more than just a tech company. We value diversity, inclusion and sustainability as we strive to make a positive impact on the world. Our development programs help support your growth, shaping your future and pushing the boundaries of innovation to unleash potential. Role Summary As a CMP Process Engineer, you will work with semiconductor CMP processing and analytical equipment to research, develop, optimize, and transfer polishing and post-CMP cleaning processes for advanced logic, memory, analog, power, and MEMS applications. You will design and conduct complex experiments, perform detailed data interpretation, and deliver robust processes that meet requirements for removal rate, uniformity, defectivity, planarity, and pattern-dependent performance (e.g., dishing/erosion). You will collaborate cross-functionally with R&D, product engineering, field/service, and customers to define requirements, execute demonstrations, and enable successful product adoption. While you deliver creative and inventive solutions, technical publications and Intellectual Property (IP) generation are an essential function of this position. This posting is intended for applicants with 2+ years of industry experience in CMP process development, integration, or applications engineering. Key Responsibilities Develop, qualify, and optimize CMP unit processes for FEOL/BEOL applications (e.g., SiC, STI, ILD, W, Cu, barrier/liner, low‑k, hardmask, advanced dielectrics) and advanced materials to balance planarity, selectivity, and defect control. Formulate and tune CMP consumables and process conditions, including slurry chemistry (oxidizers, complexing agents, corrosion inhibitors, pH control, abrasives, surfactants), pads, conditioners, and post-CMP clean chemistries to meet performance and yield targets. Drive improvements in critical CMP outputs including removal rate (RR), within-wafer non-uniformity (WIWNU), across-wafer uniformity, edge performance, dishing/erosion, scratch/particle levels, residue control, and corrosion mitigation. Design and conduct experiments using structured tools such as Design of Experiments (DOE) and Response Surface Methodology (RSM) to achieve stated objectives. Perform rigorous analysis of complex experimental output (e.g., RR maps, thickness/step height measurements, defect Pareto, metrology correlation, pattern density impacts, consumable aging effects). Establish and maintain process windows, control plans, and performance baselines; lead SPC and capability analyses (Cpk/Ppk) where applicable. Operate and troubleshoot CMP platforms and subsystems (e.g., platen/head mechanics, endpoint strategies, slurry delivery, pad conditioning, brush/PVA clean modules, filtration, temperature control). Lead structured root-cause activities using Ishikawa (fishbone), 5‑Why, and FMEA; partner with hardware, software, and service teams to define corrective actions and prevent recurrence. Utilize metrology and characterization techniques to evaluate CMP outcomes, such as profilometry, optical/laser thickness mapping, ellipsometry, AFM, SEM, and optical inspection/defect review. Develop and validate metrology strategies and sampling plans; correlate inline metrics with electrical/yield outcomes. Lead initiatives to reduce scratches, particles, residues, stains, corrosion, and delamination; optimize post-CMP clean and drying to prevent watermarking and pattern damage. Work with customers and marketing/product management to understand and define requirements, execute and document demonstrations, and translate device needs int…