Optical Network Engineer positions focus on delivering results in their domain. This page aggregates open Optical Network Engineer roles and what employers typically expect.
**What MatX Is Building** MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. ## **About the Role** This is a senior-level, highly specialized engineering role focused on the design, qualification, and productization of next-generation optical interconnect technologies for AI scale-up and scale-out networks. The engineer owns the full lifecycle — from component characterization and link budget analysis to system-level bring-up and data center deployment — across the evolving spectrum of optical integration approaches: **pluggables, NPO, and CPO**. ## **What You'll Do** **Technology Evaluation & Qualification** - Validate and productize high-speed copper and optical connectivity solutions for AI accelerator systems; own vendor due diligence and onboarding for new 1.6T products including AEC and pluggable optical transceivers.https://job-boards.greenhouse.io/xai/jobs/5043570007 - Characterize and qualify optical modules across the integration spectrum — DSP Optics, LRO, LPO, NPO, and CPO — for 800G and 1.6T deployment in scale-up AI fabrics - Perform link budget analysis and evaluate performance metrics including TDECQ, OMA, stressed receiver sensitivity, and associated diagnostics. **Component & System Engineering** - Develop expertise in transceiver components including CW lasers, SiPh PICs, EML, DSP, passive subassemblies, their failure modes, and characterization methodologies.https://job-boards.greenhouse.io/xai/jobs/5043570007 - Evaluate silicon photonics (SiPh) transceivers, VCSEL-based MMF links, and EML-based SMF solutions for scale-up fabric topologies - Apply knowledge of thermal, mechanical, power, and signal integrity constraints in dense hardware environments. **Scale-Up Network Architecture** - Define optical interconnect strategy for AI cluster topologies — rail-optimized, torus, dragonfly, and Clos — at XPU counts from 10K to 1M+ - Model and optimize end-to-end link budgets for 1.6T (200G/lane PAM4) across fiber types: SMF, MMF, MCF - Engage with the transition from 1.6T to 3.2T (400G/lane) roadmaps and new form factors emerging with LPO and CPO. **Supply Chain & Vendor Management** - Develop familiarity with subcomponent supply chains and global manufacturers, ODMs, and CMs. - Manage technical relationships with optical module vendors (Coherent, II-VI/Coherent, Lumentum, Innolight, HG Genuine, Eoptolink) and silicon photonics suppliers - Drive NPI (New Product Introduction) qualification plans, yield improvement, and reliability testing with manufacturing partners ## **What We're Looking For** **Experience & Education** - BS/MS/PhD in Electrical Engineering, Optical Engineering, Physics, or Photonics - 7–12+ years in optical interconnect engineering, with at least 3 years focused on data center or AI fabric applications - Hands-on experience qualifying 400G, 800G, or 1.6T optical modules in production environments - Deep knowledge of PAM4 signal theory, SerDes architecture, and optical link physics at 200G per lane - Proficiency in optical test equipment: BERT, OTDR, optical spectrum analyzers, sampling oscilloscopes (e.g., Keysight 86100), optical power meters, TDECQ testers - Experience with OIF-CEI, IEEE 802.3dj electrical and optical compliance specs - In-depth expertise in debugging and troubleshooting hardware; experience in the product development lifecycle. - Understanding of fiber plant requirements: MPO/MTP connector, fiber cleanliness, insertion loss, PMD, and bend radius for high-density AI cluster cabling - Experience with link budget modeling tools (MATLAB, Python-based photonic simulation, GNPY) - Ability to collaborate with switch ASIC teams (SerDes architects), PCB/signal integrity engineers, thermal/mechanical engineers, and NOS/software teams - Strong technical documentation and vendor communication skills ## **Bonus Points** **Background in AI accelerator or GPU system validationFamilia…