Advanced Packaging Reliability Engineer

ABOUT THE TEAM: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. ROLE OVERVIEW We are seeking a Package Reliability Engineer to lead reliability engineering for advanced packages used in high-performance AI and computing systems. The primary focus of this role is to assess package level mechanical and thermal reliability risks and apply thermal and mechanical modeling to optimize package design, material selection, and assembly processes. The engineer will also develop reliability test plans with external partners, identify failure mechanisms, perform root-cause analysis, and recommend practical corrective actions. In this role, you will assess package reliability risks from early architecture development through product qualification and high-volume manufacturing. You will work closely with package design, silicon design, system engineering, manufacturing, and ASIC partners to predict package behavior, develop qualification strategies, resolve reliability issues, and improve overall package robustness and lifetime. IN THIS ROLE YOU WILL: - Lead reliability test plan and assessments for advanced HPC packages, including risk identification, potential failure-mechanism analysis, root-cause investigation, mitigation planning, and corrective-action development. - Drive reliability-focused package design optimization based on thermo-mechanical modeling to improve package reliability, power integrity, thermal performance, mechanical robustness, and platform scalability. - Develop, validate, and apply package reliability models and lifetime-prediction methodologies for assembly, qualification, and product operating conditions. - Evaluate and recommend package architectures, structural designs, materials, and assembly processes to maximize reliability performance and manufacturing robustness. - Predict electromigration lifetime of package interconnects under product-specific current, temperature, workload, duty-cycle, and PCB boundary conditions. YOU MIGHT THRIVE IN THIS ROLE IF YOU HAVE: - Enjoy solving complex reliability challenges associated with cutting-edge HPC packages, including very large package form factors, high power, and high-speed chip integration. - Are excited to develop new reliability test methodologies, predictive models, and engineering solutions rather than relying solely on conventional industry practices. - Are motivated by pushing the limits of heterogeneous verfical integration (chip/package/system), high-current power delivery, advanced cooling, and large-scale package architectures. - Want to influence product architecture and design decisions through simulation-driven insights across chip, package, cooling, and system levels. - Enjoy learning broadly across semiconductor technologies, including chip architecture, power delivery, package integration, materials, cooling, and system-level interactions. MINIMUM QUALIFICATIONS - 8+ years of industry experience & knowledge of semiconductor package reliability principles and failure mechanisms, including electromigration, solder-joint fatigue, interfacial delamination, dielectric cracking, via failure, warpage, creep, stress relaxation, and material degradation. - In-depth knowledge of advanced packaging architectures, including 2.5D and 3.5D integration, interposers, embedded bridges, chiplets, large package substrates, HBM integration, redistribution layers, and package-level power delivery. - Demonstrated experience leading package failure investigations, performing root-cause analysis, and implementing effective design, material,…